Silicon (Si) is, and has been, the most popular and widely used semiconductor material for the past thirty years. During this time, Si device technology has reached an advanced level because of constant refinements and improvements. The result of this constant improvement has brought silicon power devices to such levels of efficiency that they are now approaching the theoretical maximum power limit predicted for this material. This means that further refinements in device design and processing are not likely to yield substantial improvements in performance. However, this state of affairs is not acceptable for a variety of current or future applications where silicon power-devices function with heavy operating losses. To allay this situation, materials scientists have been considering various wide bandgap semiconductors as replacements for silicon.
Silicon Carbide (SiC) is an ideal semiconductor material for high voltage, high frequency and high temperature applications. This is primarily due to the large critical electric field (10 times higher than that of Si), large bandgap (3 times that of Si), large thermal conductivity (4 times that of Si), and large electron saturation velocity (twice that of Si) of SiC. These properties make SiC an ideal replacement of Si for making devices such as MOSFETs. SiC n-channel enhancement mode MOSFETs (herein referred to as SiC MOSFETs) are ideal for applications operating at high voltage, high speed and high frequency.
In order to use silicon carbide for metal-oxide-semiconductor field effect transistors, an oxide layer is formed on a SiC substrate. The oxide can be formed on the C-face or the Si-face of the SiC crystal. However, epitaxial layers grown on the C-face are currently not commercially available, and it is therefore desired to form the gate oxide on the Si-face.
However, SiC MOSFETs currently fabricated on the Si-face of a SiC substrate have shown very poor inversion layer mobility (˜1 cm2/Vs), which is one hundred times lower than the expected mobility value. This results in large power dissipation and loss of efficiency, which makes SiC MOSFETs less attractive in comparison to their Si counterparts. The lower inversion layer mobility is primarily due to the poor interface between the gate oxide and the silicon carbide substrate through which the current conduction occurs. Specifically, the interface between the gate oxide and the SiC substrate has a large number of interface traps which in various ways interact with the electrons moving through the inversion channel.
In the article “Reduction of Interface Trap Density in 4H—SiC MOS by High-Temperature Oxidation”, by Eiichi Okuno and Shinji Amano, Materials Science Forum Vols. 389-393, 2002, it is disclosed that this problem can be mitigated by performing the oxidation rapidly. This results in a lower density of near interface traps, that is traps with interface energy near the conduction band edge.
However, when implementing rapid oxidation of SiC, a negative side effect is that the threshold voltage of the semiconductor device increases.